Journal article
Hierarchical Reversible Logic Synthesis Using LUTs
- Soeken, Mathias Integrated Systems Laboratory, EPFL, Lausanne, Switzerland
- Roetteler, Martin Microsoft Research, Redmond, WA, USA
- Wiebe, Nathan Microsoft Research, Redmond, WA, USA
- De Micheli, Giovanni Integrated Systems Laboratory, EPFL, Lausanne, Switzerland
- 2017-6-18
Published in:
- Proceedings of the 54th Annual Design Automation Conference 2017. - ACM. - 2017
- Language
-
- English
- Open access status
- closed
- Identifiers
- Persistent URL
- https://sonar.ch/global/documents/282343
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